1. Field of the Invention
The present invention relates to an image sensor and a method of manufacturing the same, and more particularly to, a CMOS image sensor and a method of manufacturing the same.
2. Description of the Prior Art
CMOS image sensors (CISs) and charge-coupled devices (CCDs) are optical circuit components for utilization with light signals and representing the light signals as digital signals. CISs and CCDs are used in the prior art. These two components are widely applied to many devices, including scanners, video cameras, and digital still cameras. CCDs use is limited in the market due to price and the volume considerations. As a result, CISs enjoy greater popularity in the market.
Since a CMOS image sensor device is produced using conventional semiconductor techniques, the CMOS image sensor has advantages of low cost and reduced device size. The CMOS image sensor is applied in digital electrical products including personal computer cameras and digital cameras and may be classified into a linear type and a plane type. The linear CMOS is often used in scanners and the plane CMOS is often used in digital cameras.
Please refer to FIG. 1 showing a cross-sectional diagram of a conventional CMOS image sensor 100. The image sensor 100 comprises a pixel array region 102, an optical black region 104, and a logic region 106, respectively formed on a semiconductor substrate 110. The semiconductor substrate 110 comprises a plurality of shallow trench isolations 112 and a plurality of photodiodes 114. Each photodiode 114 electrically connects with at least one corresponding MOS transistor (not shown). The shallow trench isolation 112 is used as an insulator between any two adjacent photodiodes 114.
A planarized layer 116 is formed over the semiconductor substrate 100 to cover the photodiodes 114 and the shallow trench isolations 112. Patterned metal layers 118, 120, and 122 are formed on the planarized layer 116. A planarized layer 124 is formed on the patterned metal layers. The planarized layer 124 may have a multilayer structure composed of, for example, a HDP layer (a silicon oxide layer formed by a high density plasma process) and a PETEOS layer (a silicon oxide layer formed from tetraethyl ortho silicate by a plasma enhanced chemical vapor deposition process). A passivation layer 130 is formed on the planarized layer 124 to prevent water vapor from entering the device section. A cap oxide layer 132 may be further deposited on the passivation layer 130.
Thereafter, a color filter array (CFA) 134 comprising a plurality of red, green, and blue (R/G/B) light filter patterns are formed on the cap oxide layer 132 in the pixel array region 102. A black layer 136 is positioned on the cap oxide layer 132 in the optical black region 104. A planarized layer 138 is formed on and between the CFA and the black layer. A plurality of microlenses 140 are formed on the planarized layer 138. A cap oxide layer 142 is disposed on the top to protect the microlenses 140. The metal layer 122 in the logic region 106 is exposed to the ambient air to serve as a pad for electric connection.
However, during the manufacturing process of a conventional CMOS image sensor, after the passivation layer 130 is formed, the photodiodes often have plenty of dangling bonds on the surface, leading to a current leakage (that is, dark current) problem. A conventional technique using a hydrogen annealing process is performed to solve the problem, as shown in FIG. 2 indicating an annealing step 131. However, a patterned metal layer 120 for light shielding contains metal atoms which may react with the hydrogen, and as a result, the removal of dangling bonds is impeded by the metal layer 120. Thus, a high dark current occurs.
Therefore, novel image sensor devices or manufacturing methods thereof are needed to solve the dark current problem.